This time we’ll continue from the last design article and add in the ability to drive multiple seven segment displays.

It’s been a while since the last article and I’ve recently come back to playing with my FPGA repo. Given the amount of time that has passed there were some updates needed for the Dockerfile and a couple of improvements I wanted to make.

As I mentioned in the last blog post I recently switched my laptop over to using Linux as my main OS from Windows 10. As part of that I was going through setting up all of my build tools for various projects and I realized the FPGA build system was a bit more cumbersome than it needed to be and, utilizing docker, it could be made more developer friendly.

Last time we took a break from Verilog and hardware design to improve our build system. This time we’re back to Verilog and for our next FPGA project we’ll create a seven segment driver circuit that will allow us to output hex characters to a single display.

A seven segment display is a set of LEDs arranged like an eight plus a decimal point like you see on cheap alarm clocks and the like.

It’s been a while since the last article, but it was well received so thanks to everyone for the great feedback!

This time we’ll take a quick break from learning Verilog to set up a better simulation environment and build process using Cmake and Conan.

The next article, which is already basically written, will be back to hardware design, using seven segment displays.

Over the last few years I’ve gotten more interested in electronics and FPGA design. I’ve also noticed that a lot of other software folks seem interested in doing the same, but often don’t know where to start. So, I think I have some interesting advice for software engineers that feel like dipping their toes into the hardware world from the point of view of a software engineer.

In this post I’ll go over FPGAs in general, the basics of the Verilog language, simulating a design and deploying it to an inexpensive TinyFPGA-BX board.